(a) Field of the Invention
The present invention relates to a technique for manufacturing a wiring board for use in mounting of a chip component such as a semiconductor device, and more particularly to a method of manufacturing a multilayer wiring board (also called a “semiconductor package”) having a multilayer structure adapted to achieve high density and high performance.
(b) Description of the Related Art
Heretofore, a build-up process has been widely used as a technique for manufacturing a multilayer wiring board. Using the build-up process makes it possible to fabricate a variety of multilayer wiring boards by means of materials (typified by resins) for an interlayer dielectric in combinations with via hole formation process. A typical manufacturing process using the build-up process involves repeating, in turn, formation of resin layers (i.e., insulating layers); formation of via holes in the resin layers; and formation of conductive patterns (i.e., wiring layers) in the via holes as well as on the resin layers, thereby building up the layers on both sides of a core substrate (i.e., on the top of and on the bottom of the core substrate) with respect to the core substrate, with the core substrate acting as a base member.
As the art related to the above prior art, for example, Japanese unexamined Patent Publication (JPP) 2004-47816 discloses the following technique. Namely, in the method of manufacturing a multilayer wiring board of the art, a tackifier for tacking an interlayer connector is first selectively applied to the surface of a layer member to be provided with the interlayer connector in a desired shape. Then, the premolded interlayer connector is tacked onto the applied tackifier. After that, a process is performed in which the layer member having the interlayer connector tacked thereon with the tackifier being therebetween, is stacked with one or more of a conductor layer, a wiring board, and prepreg.
As mentioned above, typical wiring formation technique using the conventional build-up process adopts the approach of stacking up, in turn, resin layers (having via holes formed therein) alternating with conductor layers, starting from inside (i.e., core substrate side). Accordingly, the technique has a disadvantage of requiring a considerable time. A larger number of layers stacked up, in particular, lead to a larger number of man-hours correspondingly, resulting in a problem of requiring a longer period of time for manufacture.
Since the layers are formed one after another to form a multilayer wiring structure, the yield of the process also corresponds to yields throughout all steps in the process. For example, in any of the cases where a defective condition is encountered at one of the steps or at all of the steps, the multilayer wiring board finally obtained is judged as a “defective,” the shipment of which is not permitted. In other words, the approach of building up the layers one after another, as is the case with the build-up process, has a problem of causing a reduction in the yield of a product (namely, the multilayer wiring board).
Also, conventional multilayer wiring formation technique using the build-up process uses laser and other hole formation processes for via hole formation, and hence requires a land (also called a “connection pad”) of appropriate size around a via hole opening. For this reason, the technique cannot meet the demand for fine-diameter formation and pitch reduction. Such a connection pad forms a bottleneck in high-density wiring under recent circumstances where an on-board wiring pitch has become small. The connection pad is disadvantageous in the high-density wiring, because higher wiring density, in particular, leads to a higher percentage of occupation by the connection pads (specifically, a larger area occupied by the connection pads and also a larger number of connection pads installed).
Also, although being formed in the appropriate size allowing for misalignment or the like involved in stacking, the connection pad has a limit to the “appropriate size” permitted to be designed in view of accuracy such as misalignment under the state of the art. This leads to a problem in that the connection pad does not necessarily provide an electrical connection between the boards (i.e., wiring patterns) therethrough, depending on the degree of misalignment or the like.